A multiplexer is a switch that channels one of the inputs to the output. A 2-to-1 multiplexer outputs AS + BS, where A and B are the inputs, and S is the selector that controls the switch.
From De Morgan's laws:
AS + BS
= AS + B + S
= AS(B + S)
That suggests two NAND gates, an OR gate, and an inverter arranged as follows.
The code below is based on that schematic.
muxLeft.t ih 0 ih 4 ih -4 notLeft -4 1 notRight -1 1 notRight 4 1 jr 1 o 2 ih -2 ih 3 nand 0 7 in l -6..-3 0 in s -2..1 0 in r 2..5 0 out o -2..1 13
Here are the results for all input combinations:
The selector (the center input) is 0 in the upper-row and 1 in the lower-row.
As suggested by its name, muxLeft outputs the left-input when the selector is 1. A horizontally-reflected version, muxRight, outputs the right-input when the selector is 1.
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