XOR is a two-input gate that outputs the exclusive disjunction of its inputs. That is, it outputs 1 only when the inputs are unequal.
From De Morgan's laws:
A ⊕ B
= (A ≠ B)
= AB + AB
= AA + AB + AB + BB
= A(A + B) + B(A + B)
= A C + B C, C = A + B
= A + C + B + C, C = A + B
That suggests the following construction of XOR from 3 NOR gates and an OR gate.
The code below is based on that schematic.
xor.t ih -2 ih 2 iv -4 iv 3 _norLeft 0 1 lu -2 ju 1 notLeft 2 5 notRight -3 5 ih 0 in a -4..-1 0 in b 0..3 0 out o -2..1 11
_norLeft is a compact NOR gate composed of two O-tetrominoes. It is detailed in a later section.
Here are the results for all input combinations:
The L- and J-tetrominoes resting on the O-tetrominoes and the vertical I-tetrominoes act as wires. The bases of the inverters serve as OR gates, making them function as NORs. And the horizontal I-tetromino at the top operates as an OR gate.
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